For Investors

The Future of Space Computing

The Problem

  • Legacy flight computers are certifiable but too slow for autonomy.
  • AI accelerators are powerful but non-deterministic, uncertifiable, and not radiation-tolerant.
  • Result: fragmented systems, endless test campaigns, and billions in overruns.

Our Solution — Arcturus

  • Skip years of qualification — pre-certified modules with reusable compliance evidence.
  • Safe autonomy out of the box — deterministic SDK with bounded-time libraries for control, autonomy, and inference.
  • Faster testing, faster flying — validation harness integrated into HIL/SIL environments.

Why Now?

  • Prototyping is cheap: FPGA + chiplets let small teams validate what once took $50M
  • Fabrication is accessible: MPW + open EDA cut first silicon to ~$2M, not $20M
  • Urgency is real: Defense, climate, and space now demand autonomy at the edge
  • Unfair advantage: Ex-Rocket Lab founders with direct access to hundreds of test flights

Proof of Demand

$7.4B

US Defense Autonomy (FY24)

70,000+

Satellites this decade

100+

Beta developers by Q2 ’26

Immediate Wedge – Aerospace

We aim to leverage the international university ecosystem for rapid prototyping, talent, and extensive testing. Through partnerships with student teams, Arcturus will build a community of hundreds of beta developers, providing validation and driving early adoption at scale.

Market Opportunity

Sector TAM Contribution Avionics/Compute Opportunity Notes
Satellites & Launch $200B+ $7–10B+ (Satellite + Launch Avionics) 70k+ satellites this decade
Defense Autonomy $120–180B $10–20B+ (C2, ISR, UAV swarms) Autonomy budgets ~12% CAGR
Automotive Safety $600B+ $90–160B+ (ISO 26262 systems) ADAS/robotaxi
Medical Devices $1.3T $90–160B+ (robotics, imaging, infusion) IEC 62304
Industrial, Energy, Adjacent Infra $800B+ $55–150B+ (automation, power grids, rail, maritime, mining) IEC 61508
$250–500B+

Total Addressable Market by 2035

Go-To-Market

  • Phase 1 — Devkits: FPGA devkits and SDK to seed developer base.
  • Phase 2 — Silicon + Pilots: MPW silicon, flight validation, early aerospace pilots.
  • Phase 3 — Non-space Variants: Adapted variants for automotive, medical, industrial.

Development Roadmap

Q4 ’25

FPGA prototype + SDK devkits

  • Dev boards in lab & initial SDK APIs frozen.
  • HIL/SIL harness alpha.
Q1 ’26

Superset IR radiation tests

  • SEE characterization; safety claims narrowed.
  • Beta partner kits shipped.
Q2 ’26

Silicon MPW

  • Tape-in; post-layout timing signoff.
  • SDK runtime lock + docs v1.0.
Q3 ’26

Evaluation boards

  • Bring-up; perf/power public report.
  • Radiation—supplemental validation.
Q4 ’26

Pilot shipments

  • Flight-like env. tests; payload processing proofs.
  • Early flight program MoUs.
Done In progress Planned

Team

Patrick Bellamy – Co-Founder

Ex-Flight Software @ Rocket Lab
Led University of Melbourne Rocketry to international success; IAC-published. Brings flight-critical software expertise and leadership of 100+ engineers.

Jack Ulbrich-Baker – Co-Founder

Ex-GNC @ Rocket Lab
Led Monash University Rover Team; IEEE published; Brings control systems and hardware expertise, alongside leadership of 100+ engineering teams.

Our team brings deep experience from Rocket Lab, one of the most successful private space companies. We have direct knowledge from hundreds of actual space missions and understand both the technical challenges and business realities of space.

We're driven by passion for innovation and a desire to solve problems we lived through firsthand. Our unique position allows us to bridge the gap between heritage systems and modern AI.

We were frustrated watching brilliant space companies struggle with outdated tools. We believed modern computing could work in space if designed properly, and we were in a unique position to make it happen.

The Ask

Stage Raise Target Duration Outcomes
Pre-Seed $500k – 1.0M 8 mo FPGA prototypes flying, SDK initial release, initial radiation + supersonic validation, begin flight heritage
Seed $3.0M – 5.0M 18–24 mo First Arcturus silicon fabricated & validated, chips + SDK deployed to pilot aerospace customers, initial contracts secured

Use of Funds

  • Silicon MPW and bring-up
  • SDK + validation harness development
  • Certification toolchains and evidence generation
  • Pilot programs with aerospace and defense partners

Risks & Mitigations

  • Silicon schedule risk → mitigated by FPGA devkits + MPW slots.
  • Certification scope creep → mitigated by narrowing initial claim set.
  • Market focus → mitigated by aerospace/defense beachhead first.

Next Steps

Download One-Pager Book a 20-min Call Request Pilot Terms